Adeia Semiconductor Solutions LLC
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
104
Ending by 2030
Nov 2026
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 4 fees due Nov 28 to 30, 2026 · next Nov 28
- 17 fees due Dec 4 to 25, 2026 · next Dec 4
- 15 fees due Jan 9 to 30, 2027 · next Jan 9
- 14 fees due Feb 4 to 27, 2027 · next Feb 4
- 12 fees due Mar 1 to 24, 2027 · next Mar 1
- 9 fees due Apr 3 to 30, 2027 · next Apr 3
- 4 fees due May 17 to 28, 2027 · next May 17
- 8 fees due Jun 1 to 29, 2027 · next Jun 1
- 5 fees due Jul 5 to 28, 2027 · next Jul 5
- 16 fees due Aug 2 to 25, 2027 · next Aug 2
- 16 fees due Sep 3 to 30, 2027 · next Sep 3
- 18 fees due Oct 5 to 28, 2027 · next Oct 5
- 6 fees due Nov 3 to 12, 2027 · next Nov 3
Recent changes
- 1 of the patents on this record was granted since Aug 16, 2026
- 4 terms have ended since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 8,569,876 | Packaged Semiconductor Chips with Array In force · High confidence | In force | High confidence | |
| US 8,653,644 | Packaged Semiconductor Chips with Array In force · High confidence | In force | High confidence | |
| US 8,704,347 | Packaged Semiconductor Chips In force · High confidence | In force | High confidence | |
| US 9,070,678 | Packaged Semiconductor Chips with Array In force · High confidence | In force | High confidence | |
| US 9,548,254 | Packaged Semiconductor Chips with Array In force · High confidence | In force | High confidence | |
| US 8,039,959 | Microelectronic Connection Component In force · Medium confidence | In force | Medium confidence | |
| US 8,115,308 | Microelectronic Assemblies Having Compliancy and Methods Therefor In force · High confidence | In force | High confidence | |
| US 8,349,654 | Method of Fabricating Stacked Packages with Bridging Traces In force · High confidence | In force | High confidence | |
| US 8,034,665 | Microelectronic Package with Thermal Access In force · High confidence | In force | High confidence | |
| US 7,456,095 | Method and Apparatus for Forming Nickel Silicide with Low Defect Density in Fet Devices In force · High confidence | In force | High confidence |
Also on record, not counted in the 703: 20 lapsed for an unpaid fee · 26 ended at full term · 5 surrendered on reissue. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
9 pending