Ampere Computing LLC
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Mar 2031
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 4 fees due Dec 4 to 16, 2026 · next Dec 4
- 2 fees due Jan 2 to 9, 2027 · next Jan 2
- 1 fee due Feb 6, 2027The maintenance fee for Data Managment for Cache Memory (US 10,372,615) comes due Feb 6, 2027. Unpaid by Aug 6, 2027, it lapses early.
- 3 fees due Mar 19 to 29, 2027 · next Mar 19
- 4 fees due Apr 6 to 27, 2027 · next Apr 6
- 1 fee due May 21, 2027The maintenance fee for Flexible Storage and Optimized Search for Multiple Page Sizes in a Translation Lookaside Buffer (US 11,822,487) comes due May 21, 2027. Unpaid by Nov 22, 2027, it lapses early.
- 1 fee due Jun 15, 2027The maintenance fee for Broadcast Messaging and Acknowledgment Messaging for Power Management in a Multiprocessor System (US 9,213,643) comes due Jun 15, 2027. Unpaid by Dec 15, 2027, it lapses early.
- 4 fees due Jul 9 to 23, 2027 · next Jul 9
- 4 fees due Sep 8 to 29, 2027 · next Sep 8
- 4 fees due Oct 2 to 30, 2027 · next Oct 2
- 3 fees due Nov 7 to 10, 2027 · next Nov 7
Recent changes
- 5 of the patents on this record were granted since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 8,604,854 | Pseudo Single-Phase Flip-Flop (PSP-FF) In force · Medium confidence | In force | Medium confidence | |
| US 8,618,856 | Shadow Latch In force · High confidence | In force | High confidence | |
| US 8,384,421 | Digital CMOS Circuit with Noise Cancellation In force · High confidence | In force | High confidence | |
| US 8,762,915 | System and Method for Integrated Circuit Die Size Reduction In force · High confidence | In force | High confidence | |
| US 8,421,514 | Hazard-Free Minimal-Latency Flip-Flop (HFML-FF) In force · High confidence | In force | High confidence | |
| US 8,793,334 | Network-Attached Storage (NAS) Bandwidth Manager In force · High confidence | In force | High confidence | |
| US 8,499,012 | System and Method for Attached Storage Stacking In force · High confidence | In force | High confidence | |
| US 8,397,197 | Integrated Circuit Module Time Delay Budgeting In force · High confidence | In force | High confidence | |
| US 8,497,721 | Pass Gate Shadow Latch In force · High confidence | In force | High confidence | |
| US 8,429,315 | Stashing System and Method for the Prevention of Cache Thrashing In force · High confidence | In force | High confidence |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
13 pending · 5 abandoned