Aplus Semiconductor Technologies Co., Ltd.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Aug 2034
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Dec 4, 2026The maintenance fee for Linear voltage regulator for low-power digital circuit of chip (US 10,310,529) comes due Dec 4, 2026. Unpaid by Jun 4, 2027, it lapses early.
- 3 fees due Mar 1 to 10, 2027 · next Mar 1
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
Showing 1 to 7 of 7
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 9,128,663 | Touch sensing electrode structure and method of manufacturing same In force · From the USPTO record | In force | From the USPTO record | |
| US 9,122,336 | Conductive electrode structure In force · From the USPTO record | In force | From the USPTO record | |
| US 9,345,181 | Shielding film and method of manufacturing same In force · From the USPTO record | In force | From the USPTO record | |
| US 10,411,679 | Ultra-low voltage two-stage ring voltage-controlled oscillator applied to chip circuit In force · From the USPTO record | In force | From the USPTO record | |
| US 10,310,529 | Linear voltage regulator for low-power digital circuit of chip In force · From the USPTO record | In force | From the USPTO record | |
| US 11,406,018 | Double-sided and Multilayer Flexible Printed Circuit (FPC) Substrate and Method of Processing the Same In force · High confidence | In force | High confidence | |
| US 12,089,331 | Metal Circuit Structure Based on FPC and Method of Making the Same In force · High confidence | In force | High confidence |
Also on record, not counted in the 7: 1 lapsed for an unpaid fee. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
1 abandoned