Arteris, Inc.
4 more in force are now held by other companies
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Apr 2034
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Dec 13, 2026The maintenance fee for Optimization of parameters for synthesis of a topology using a discriminant function module (US 11,675,942) comes due Dec 13, 2026. Unpaid by Jun 14, 2027, it lapses early.
- 1 fee due Feb 15, 2027The maintenance fee for Broadcast switch system in a network-on-chip (NoC) (US 11,729,088) comes due Feb 15, 2027. Unpaid by Aug 16, 2027, it lapses early.
- 3 fees due Mar 5 to 12, 2027 · next Mar 5
- 7 fees due Apr 1 to 30, 2027 · next Apr 1
- 2 fees due May 26 to 28, 2027 · next May 26
- 3 fees due Jun 5 to 19, 2027 · next Jun 5
- 1 fee due Jul 7, 2027The maintenance fee for Protection scheme conversion (US 10,528,421) comes due Jul 7, 2027. Unpaid by Jan 7, 2028, it lapses early.
- 1 fee due Aug 11, 2027The maintenance fee for Systems and Methods for Security and Safety Fault Analysis Using Information Flow (US 10,558,771) comes due Aug 11, 2027. Unpaid by Feb 11, 2028, it lapses early.
- 2 fees due Sep 5 to 17, 2027 · next Sep 5
- 3 fees due Oct 5 to 16, 2027 · next Oct 5
Recent changes
- 8 of the patents on this record were granted since Aug 16, 2026
- 1 term has ended since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 10,083,305 | Method and System Providing Mutli-Level Security to Gate Level Information Flow In force · High confidence | In force | High confidence | |
| US 9,305,166 | Method and Systems for Detecting and Isolating Hardware Timing Channels In force · High confidence | In force | High confidence | |
| US 9,710,590 | Estimation of chip floorplan activity distribution In force · From the USPTO record | In force | From the USPTO record | |
| US 11,080,191 | Configurable snoop filters for cache coherent systems In force · From the USPTO record | In force | From the USPTO record | |
| US 11,100,269 | System and method for estimation of chip floorplan activity In force · From the USPTO record | In force | From the USPTO record | |
| US 10,430,545 | Estimation of chip floorplan activity distribution In force · From the USPTO record | In force | From the USPTO record | |
| US 11,237,965 | Configurable snoop filters for cache coherent systems In force · From the USPTO record | In force | From the USPTO record | |
| US 9,825,779 | Network-on-chip (NoC) topology generation In force · From the USPTO record | In force | From the USPTO record | |
| US 9,542,316 | System and method for adaptation of coherence models between agents In force · From the USPTO record | In force | From the USPTO record | |
| US 10,255,183 | Victim Buffer for Cache Coherent Systems In force · Medium confidence | In force | Medium confidence |
Also on record, not counted in the 108: 4 patents in force now held by others · 5 lapsed for an unpaid fee · 1 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
9 pending · 21 no status recorded