Artery Technology Company
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Dec 2038
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Aug 11, 2027The maintenance fee for Dynamic bias current generator and associated electronic device (US 10,558,233) comes due Aug 11, 2027. Unpaid by Feb 11, 2028, it lapses early.
- 1 fee due Sep 30, 2027The maintenance fee for Power-on reset circuit and related reset method (US 10,608,619) comes due Sep 30, 2027. Unpaid by Mar 31, 2028, it lapses early.
- 1 fee due Oct 21, 2027The maintenance fee for Oscillator circuit and associated oscillator device (US 10,630,297) comes due Oct 21, 2027. Unpaid by Apr 21, 2028, it lapses early.
Recent changes
- 1 of the patents on this record was granted since Aug 17, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 10,630,297 | Oscillator circuit and associated oscillator device In force · From the USPTO record | In force | From the USPTO record | |
| US 10,666,196 | Crystal oscillator control circuit and associated oscillation device In force · From the USPTO record | In force | From the USPTO record | |
| US 10,558,233 | Dynamic bias current generator and associated electronic device In force · From the USPTO record | In force | From the USPTO record | |
| US 10,608,619 | Power-on reset circuit and related reset method In force · From the USPTO record | In force | From the USPTO record | |
| US 10,693,447 | Comparator circuit In force · From the USPTO record | In force | From the USPTO record | |
| US 10,804,888 | Delay circuit and electronic system equipped with delay circuit In force · From the USPTO record | In force | From the USPTO record | |
| US 10,761,558 | Clock fail detector In force · From the USPTO record | In force | From the USPTO record | |
| US 10,985,706 | Hysteresis comparator In force · From the USPTO record | In force | From the USPTO record | |
| US 11,243,552 | Voltage divider circuit regarding battery voltage, and associated electronic device equipped with voltage divider circuit In force · From the USPTO record | In force | From the USPTO record | |
| US 11,418,207 | Analog-to-digital converter device equipped with conversion suspension function, and operation method thereof In force · From the USPTO record | In force | From the USPTO record |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
3 no status recorded