Ateco Inc.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Jul 2040
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 3 fees due Apr 30, 2027
- 1 fee due Oct 23, 2027The maintenance fee for Electronic component test handler having flying scan function (US 11,965,926) comes due Oct 23, 2027. Unpaid by Apr 24, 2028, it lapses early.
Recent changes
- 2 of the patents on this record were granted since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
Showing 1 to 10 of 10
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 11,802,905 | System level test device for memory In force · From the USPTO record | In force | From the USPTO record | |
| US 11,802,906 | Electronic component test handler having hand teaching function and hand teaching method using same In force · From the USPTO record | In force | From the USPTO record | |
| US 11,802,907 | Stacker of electronic component test handler, and electronic component test handler including same In force · From the USPTO record | In force | From the USPTO record | |
| US 11,965,926 | Electronic component test handler having flying scan function In force · From the USPTO record | In force | From the USPTO record | |
| US 12,352,810 | System for testing performance of device in temperature load test In force · From the USPTO record | In force | From the USPTO record | |
| US 12,474,398 | Test board capable of regulating testing temperature of semiconductor devices In force · From the USPTO record | In force | From the USPTO record | |
| US 12,436,574 | System for memory module mounting test and method therefor In force · From the USPTO record | In force | From the USPTO record | |
| US 12,754,227 | Test Tray for Semiconductor Devices and Test Apparatus Using the Same In force · High confidence | In force | High confidence | |
| US 12,699,130 | Test Tray for Semiconductor Devices and Test Apparatus Using the Same In force · High confidence | In force | High confidence | |
| US 12,736,581 | Insert Inserted to Tray for Transporting Semiconductor Products, Tray Including the Insert, and Semiconductor Product Test System Including the Insert In force · High confidence | In force | High confidence |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
4 pending · 1 no status recorded