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Routing Layer for Mitigating Stress in a Semiconductor Die

ATI Technologies ULC

A patent family: one line of work, grouped by real continuity rather than by a technology label inferred from titles. 5 of these applications claim priority to application 12/604,584, filed Oct 23, 2009. A shared origin can cover several different claimed inventions, which is why members here may not share a title. In-force patents first, soonest term end first, then patent number. Expired patents follow, in the same order.
PatentTitleHolderStatusExpiresTime remainingConfidence
US 8,227,926Routing Layer for Mitigating Stress in a Semiconductor Die
In force
 · High confidence
ATI Technologies ULCIn force
High confidence
US 8,299,632Routing Layer for Mitigating Stress in a Semiconductor Die
In force
 · High confidence
ATI Technologies ULCIn force
High confidence
US 8,642,463Routing Layer for Mitigating Stress in a Semiconductor Die
In force
 · High confidence
ATI Technologies ULCIn force
High confidence
US 8,664,777Routing Layer for Mitigating Stress in a Semiconductor Die
In force
 · High confidence
ATI Technologies ULCIn force
High confidence
US 9,035,471Routing Layer for Mitigating Stress in a Semiconductor Die
In force
 · Medium confidence
ATI Technologies ULCIn force
Medium confidence
US 9,059,159Routing Layer for Mitigating Stress in a Semiconductor Die
In force
 · High confidence
ATI Technologies ULCIn force
High confidence
6 of 6 records shown. In-force patents first, soonest term end first, then patent number. Expired patents follow, in the same order.
Updated Nov 15, 2026 · includes USPTO assignment & status data published Nov 15, 2026 and grant & fee data published Nov 10, 2026 (weekly) · how we know
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
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