Bitmicro LLC
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
15
Ending by 2030
Dec 2026
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Nov 26, 2026The maintenance fee for Distributed ECC engine for storage media (US 9,043,669) comes due Nov 26, 2026. Unpaid by May 26, 2027, it lapses early.
- 2 fees due Feb 4 to 6, 2027 · next Feb 4
- 3 fees due Mar 3 to 24, 2027 · next Mar 3
- 3 fees due Apr 1 to 29, 2027 · next Apr 1
- 1 fee due May 26, 2027The maintenance fee for Scatter-gather approach for parallel data transfer in a mass storage system (US 10,489,318) comes due May 26, 2027. Unpaid by Nov 26, 2027, it lapses early.
- 1 fee due Jul 21, 2027The maintenance fee for Adaptive power cycle sequences for data recovery (US 10,540,242) comes due Jul 21, 2027. Unpaid by Jan 21, 2028, it lapses early.
- 1 fee due Aug 4, 2027The maintenance fee for Multi-dimensional computer storage system (US 10,552,050) comes due Aug 4, 2027. Unpaid by Feb 4, 2028, it lapses early.
- 1 fee due Oct 21, 2027The maintenance fee for FPGA functionality mode switch-over (US 10,627,798) comes due Oct 21, 2027. Unpaid by Apr 21, 2028, it lapses early.
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 8,010,740 | Optimizing memory operations in an electronic storage device In force · From the USPTO record | In force | From the USPTO record | |
| US 7,613,876 | Hybrid multi-tiered caching storage system In force · From the USPTO record | In force | From the USPTO record | |
| US 7,716,389 | Direct memory access controller with encryption and decryption for non-blocking high bandwidth I/O transactions In force · From the USPTO record | In force | From the USPTO record | |
| US 7,826,243 | Multiple chip module and package stacking for storage devices In force · From the USPTO record | In force | From the USPTO record | |
| US 10,120,586 | Memory transaction with reduced latency In force · From the USPTO record | In force | From the USPTO record | |
| US 7,729,370 | Apparatus for networking devices having fibre channel node functionality In force · From the USPTO record | In force | From the USPTO record | |
| US 8,959,307 | Reduced latency memory read transactions in storage devices In force · From the USPTO record | In force | From the USPTO record | |
| US 8,165,301 | Input-output device and storage controller handshake protocol using key exchange for data security In force · From the USPTO record | In force | From the USPTO record | |
| US 10,149,399 | Solid state drive with improved enclosure assembly In force · From the USPTO record | In force | From the USPTO record | |
| US 8,788,725 | Multilevel memory bus system for solid-state mass storage In force · From the USPTO record | In force | From the USPTO record |
Also on record, not counted in the 59: 5 lapsed for an unpaid fee · 13 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
1 no status recorded