Celerint, LLC
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Nov 2031
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Feb 20, 2027The maintenance fee for Method for continuous tester operation during multiple stage temperature testing (US 10,386,405) comes due Feb 20, 2027. Unpaid by Aug 20, 2027, it lapses early.
- 1 fee due Mar 24, 2027The maintenance fee for Method and system for utilizing stand-alone controller in multiplexed handler test cell for indexless tandem semiconductor test (US 10,422,828) comes due Mar 24, 2027. Unpaid by Sep 24, 2027, it lapses early.
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 9,753,081 | Muxing interface platform for multiplexed handlers to reduce index time system and method In force · From the USPTO record | In force | From the USPTO record | |
| US 9,733,301 | Universal multiplexing interface system and method In force · From the USPTO record | In force | From the USPTO record | |
| US 9,817,062 | Parallel concurrent test system and method In force · From the USPTO record | In force | From the USPTO record | |
| US 9,551,740 | Parallel concurrent test system and method In force · From the USPTO record | In force | From the USPTO record | |
| US 9,818,631 | Semiconductor device handler throughput optimization In force · From the USPTO record | In force | From the USPTO record | |
| US 10,043,722 | Method for testing semiconductor wafers using temporary sacrificial bond pads In force · From the USPTO record | In force | From the USPTO record | |
| US 10,197,622 | Modular multiplexing interface assembly for reducing semiconductor testing index time In force · From the USPTO record | In force | From the USPTO record | |
| US 10,422,828 | Method and system for utilizing stand-alone controller in multiplexed handler test cell for indexless tandem semiconductor test In force · From the USPTO record | In force | From the USPTO record | |
| US 10,386,405 | Method for continuous tester operation during multiple stage temperature testing In force · From the USPTO record | In force | From the USPTO record | |
| US 11,448,688 | Method for continuous tester operation during long soak time testing In force · From the USPTO record | In force | From the USPTO record |
Also on record, not counted in the 14: 4 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
Every application published under this name has become a patent.