Eliyan Corporation
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Jul 2040
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 4 fees due Jun 12 to 26, 2027 · next Jun 12
- 1 fee due Aug 6, 2027The maintenance fee for Multi-Chip Module (MCM) with Multi-Port Unified Memory (US 11,893,242) comes due Aug 6, 2027. Unpaid by Feb 7, 2028, it lapses early.
Recent changes
- 4 of the patents on this record were granted since Aug 17, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 11,855,056 | Low Cost Solution for 2.5D and 3D Packaging Using Usr Chiplets In force · High confidence | In force | High confidence | |
| US 12,494,469 | Low Cost Solution for 2.5D and 3D Packaging Using Usr Chiplets In force · High confidence | In force | High confidence | |
| US 11,855,043 | Complex system-in-package architectures leveraging high-bandwidth long-reach die-to-die connectivity over package substrates In force · From the USPTO record | In force | From the USPTO record | |
| US 12,667,022 | Complex system-in-package architectures leveraging high-bandwidth long-reach die-to-die connectivity over package substrates In force · Medium confidence | In force | Medium confidence | |
| US 12,204,794 | Architecture for DRAM Control Optimization Using Simultaneous Bidirectional Memory Interfaces In force · High confidence | In force | High confidence | |
| US 12,775,422 | Architecture for DRAM Control Optimization Using Simultaneous Bidirectional Memory Interfaces In force · High confidence | In force | High confidence | |
| US 11,842,986 | Multi-Chip Module (MCM) with Interface Adapter Circuitry In force · High confidence | In force | High confidence | |
| US 11,893,242 | Multi-Chip Module (MCM) with Multi-Port Unified Memory In force · High confidence | In force | High confidence | |
| US 12,190,038 | Multi-Chip Module (MCM) with Multi-Port Unified Memory In force · High confidence | In force | High confidence | |
| US 12,204,759 | Multi-chip module (MCM) with multi-port unified memory In force · From the USPTO record | In force | From the USPTO record |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.