GSI Technology Inc.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
14
Ending by 2030
Feb 2027
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 2 fees due Dec 6 to 20, 2026 · next Dec 6
- 1 fee due Jan 7, 2027The maintenance fee for Charge sharing in a TCAM array (US 9,076,527) comes due Jan 7, 2027. Unpaid by Jul 7, 2027, it lapses early.
- 1 fee due Feb 22, 2027The maintenance fee for In memory matrix multiplication and its usage in neural networks (US 11,734,385) comes due Feb 22, 2027. Unpaid by Aug 23, 2027, it lapses early.
- 6 fees due Mar 3 to 24, 2027 · next Mar 3
- 1 fee due Apr 13, 2027The maintenance fee for Systems and methods of double/quad data rate memory involving input latching, self-timing and/or other features (US 9,159,391) comes due Apr 13, 2027. Unpaid by Oct 13, 2027, it lapses early.
- 3 fees due May 24 to 26, 2027 · next May 24
- 2 fees due Jun 24 to 30, 2027 · next Jun 24
- 4 fees due Jul 2 to 19, 2027 · next Jul 2
- 2 fees due Sep 24 to 26, 2027 · next Sep 24
- 3 fees due Oct 12 to 28, 2027 · next Oct 12
Recent changes
- 1 of the patents on this record was granted since Aug 16, 2026
- 1 term has ended since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 7,389,457 | Shift Registers Free of Timing Race Boundary Scan Registers with Two-Phase Clock Control In force · High confidence | In force | High confidence | |
| US 7,516,385 | Test Semiconductor Device in Full Frequency with Half Frequency Tester In force · High confidence | In force | High confidence | |
| US 8,116,161 | System and method for refreshing a DRAM device In force · From the USPTO record | In force | From the USPTO record | |
| US 7,646,215 | Efficient Method for Implementing Programmable Impedance Output Drivers and Programmable Input on Die Termination on a Bi-Directional Data Bus In force · High confidence | In force | High confidence | |
| US 7,595,657 | Dynamic Dual Control On-Die Termination In force · High confidence | In force | High confidence | |
| US 7,965,564 | Processor arrays made of standard memory cells In force · From the USPTO record | In force | From the USPTO record | |
| US 8,341,362 | System, method and apparatus for memory with embedded associative section for computations In force · From the USPTO record | In force | From the USPTO record | |
| US 8,542,050 | Minimized Line Skew Generator In force · High confidence | In force | High confidence | |
| US 8,711,638 | Using storage cells to perform computation In force · From the USPTO record | In force | From the USPTO record | |
| US 8,908,465 | Using storage cells to perform computation In force · From the USPTO record | In force | From the USPTO record |
Also on record, not counted in the 148: 12 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
7 pending · 2 abandoned · 16 no status recorded