Inoso, LLC
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Aug 2033
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Jan 21, 2027The maintenance fee for Method of forming a stacked low temperature transistor and related devices (US 9,087,689) comes due Jan 21, 2027. Unpaid by Jul 21, 2027, it lapses early.
- 1 fee due Jun 1, 2027The maintenance fee for Method of forming a stacked low temperature transistor and related devices (US 9,202,756) comes due Jun 1, 2027. Unpaid by Dec 1, 2027, it lapses early.
- 1 fee due Sep 24, 2027The maintenance fee for Electromechanical power switch integrated circuits and devices and methods thereof (US 10,600,600) comes due Sep 24, 2027. Unpaid by Mar 24, 2028, it lapses early.
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
Showing 1 to 8 of 8
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 8,786,130 | Method of forming an electromechanical power switch for controlling power to integrated circuit devices and related devices In force · From the USPTO record | In force | From the USPTO record | |
| US 8,916,872 | Method of Forming a Stacked Low Temperature Diode and Related Devices In force · High confidence | In force | High confidence | |
| US 9,087,689 | Method of forming a stacked low temperature transistor and related devices In force · From the USPTO record | In force | From the USPTO record | |
| US 9,202,756 | Method of forming a stacked low temperature transistor and related devices In force · From the USPTO record | In force | From the USPTO record | |
| US 10,600,600 | Electromechanical power switch integrated circuits and devices and methods thereof In force · From the USPTO record | In force | From the USPTO record | |
| US 10,879,025 | Electromechanical power switch integrated circuits and devices and methods thereof In force · From the USPTO record | In force | From the USPTO record | |
| US 12,278,070 | Electromechanical power switch integrated circuits and devices and methods thereof In force · From the USPTO record | In force | From the USPTO record | |
| US 11,562,871 | Electromechanical power switch integrated circuits and devices and methods thereof In force · From the USPTO record | In force | From the USPTO record |
Also on record, not counted in the 8: 1 lapsed for an unpaid fee. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
Every application published under this name has become a patent.