Interlink Silicon Solutions Inc.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
15
Ending by 2030
Jan 2027
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Dec 11, 2026The maintenance fee for Circuits for Pulse-Width Control in Memory Devices and Related Methods (US 10,319,432) comes due Dec 11, 2026. Unpaid by Jun 11, 2027, it lapses early.
- 1 fee due Jan 21, 2027The maintenance fee for Method and Program for Selective Suspension of USB Device (US 9,087,031) comes due Jan 21, 2027. Unpaid by Jul 21, 2027, it lapses early.
- 1 fee due Apr 6, 2027The maintenance fee for DRAM and Access and Operating Method Thereof (US 9,153,301) comes due Apr 6, 2027. Unpaid by Oct 6, 2027, it lapses early.
- 1 fee due May 24, 2027The maintenance fee for Data Storing Method and Apparatus Applied to Flash Memory Storage Device (US 9,195,582) comes due May 24, 2027. Unpaid by Nov 24, 2027, it lapses early.
- 1 fee due Jun 15, 2027The maintenance fee for DRAM and Access and Operating Method Thereof (US 9,214,201) comes due Jun 15, 2027. Unpaid by Dec 15, 2027, it lapses early.
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 7,533,315 | Integrated Circuit with Scan-Based Debugging and Debugging Method Thereof In force · High confidence | In force | High confidence | |
| US 7,561,481 | Memory Controllers and Pad Sequence Control Methods Thereof In force · High confidence | In force | High confidence | |
| US 7,889,583 | Memory Circuit and Tracking Circuit Thereof In force · High confidence | In force | High confidence | |
| US 7,787,317 | Memory Circuit and Tracking Circuit Thereof In force · High confidence | In force | High confidence | |
| US 7,973,605 | Three-Stage Frequency-Compensated Operational Amplifier for Driving Large Capacitive Loads In force · High confidence | In force | High confidence | |
| US 8,032,134 | Beamforming with Global Positioning and Orientation Systems In force · High confidence | In force | High confidence | |
| US 7,995,681 | Method and an Apparatus for Timing Control of Channel Estimation In force · High confidence | In force | High confidence | |
| US 8,078,131 | Method for Mitigating Interference In force · High confidence | In force | High confidence | |
| US 8,086,793 | Optical Disc Recorder and Buffer Management Method Thereof In force · High confidence | In force | High confidence | |
| US 8,027,375 | Shared Filter Design for Pilot Symbol Averaging in Rake Fingers in Wcdma Systems In force · High confidence | In force | High confidence |
Also on record, not counted in the 33: 1 lapsed for an unpaid fee · 3 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.