Kalray
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
1
Ending by 2030
Jul 2029
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Dec 23, 2026The maintenance fee for Extensible network-on-chip (US 9,064,092) comes due Dec 23, 2026. Unpaid by Jun 23, 2027, it lapses early.
- 1 fee due Apr 20, 2027The maintenance fee for Statically Allocating Set of Tasks to Particular Cluster and Dynamically Allocating Each Task to Different Processing Units Within Cluster (US 9,164,807) comes due Apr 20, 2027. Unpaid by Oct 20, 2027, it lapses early.
- 1 fee due May 19, 2027The maintenance fee for Method for dispatching network frames among processing resources (US 10,484,514) comes due May 19, 2027. Unpaid by Nov 19, 2027, it lapses early.
Recent changes
- 2 of the patents on this record were granted since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 8,510,478 | Circuit Comprising a Microprogrammed Machine for Processing the Inputs or the Outputs of a Processor So as to Enable Them to Enter or Leave the Circuit According to Any Communication Protocol In force · High confidence | In force | High confidence | |
| US 8,593,818 | Network on chip building bricks In force · From the USPTO record | In force | From the USPTO record | |
| US 9,164,807 | Statically Allocating Set of Tasks to Particular Cluster and Dynamically Allocating Each Task to Different Processing Units Within Cluster In force · High confidence | In force | High confidence | |
| US 9,565,122 | Stream management in an on-chip network In force · From the USPTO record | In force | From the USPTO record | |
| US 9,367,287 | Mixed precision fused multiply-add operator In force · From the USPTO record | In force | From the USPTO record | |
| US 9,813,348 | System for transmitting concurrent data flows on a network In force · From the USPTO record | In force | From the USPTO record | |
| US 9,064,092 | Extensible network-on-chip In force · From the USPTO record | In force | From the USPTO record | |
| US 9,851,977 | Apparatus and method for combining thread warps with compatible execution masks for simultaneous execution and increased lane utilization In force · From the USPTO record | In force | From the USPTO record | |
| US 9,766,951 | Hardware synchronization barrier between processing units In force · From the USPTO record | In force | From the USPTO record | |
| US 10,175,989 | VLIW type instruction packet structure and processor suitable for processing such an instruction packet In force · From the USPTO record | In force | From the USPTO record |
Also on record, not counted in the 23: 3 lapsed for an unpaid fee. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
4 no status recorded