Marlin Semiconductor Limited
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
92
Ending by 2030
Jan 2027
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Nov 26, 2026The maintenance fee for Semiconductor Structure (US 9,041,155) comes due Nov 26, 2026. Unpaid by May 26, 2027, it lapses early.
- 10 fees due Dec 2 to 30, 2026 · next Dec 2
- 5 fees due Jan 2 to 30, 2027 · next Jan 2
- 6 fees due Feb 6 to 27, 2027 · next Feb 6
- 6 fees due Mar 1 to 29, 2027 · next Mar 1
- 8 fees due Apr 6 to 29, 2027 · next Apr 6
- 3 fees due May 3 to 12, 2027 · next May 3
- 7 fees due Jun 8 to 30, 2027 · next Jun 8
- 2 fees due Jul 7 to 12, 2027 · next Jul 7
- 9 fees due Aug 4 to 23, 2027 · next Aug 4
- 3 fees due Sep 8 to 29, 2027 · next Sep 8
- 8 fees due Oct 5 to 21, 2027 · next Oct 5
- 6 fees due Nov 3 to 12, 2027 · next Nov 3
Recent changes
- 7 terms have ended since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 7,432,167 | Method of Fabricating a Strained Silicon Channel Metal Oxide Semiconductor Transistor In force · High confidence | In force | High confidence | |
| US 7,528,045 | Mos Transistor and Manufacturing Methods Thereof In force · High confidence | In force | High confidence | |
| US 7,872,292 | Capacitance Dielectric Layer and Capacitor In force · High confidence | In force | High confidence | |
| US 7,772,064 | Method of Fabricating Self-Aligned Contact In force · High confidence | In force | High confidence | |
| US 8,058,733 | Self-Aligned Contact Set In force · High confidence | In force | High confidence | |
| US 7,485,523 | Method for Forming High Voltage Device and Semiconductor Device In force · High confidence | In force | High confidence | |
| US 7,527,900 | Reticle and Optical Proximity Correction Method In force · High confidence | In force | High confidence | |
| US 7,786,546 | System-On-Chip with Shield Rings for Shielding Functional Blocks Therein from Electromagnetic Interference In force · High confidence | In force | High confidence | |
| US 7,745,889 | Metal Oxide Semiconductor Transistor with Y Shape Metal Gate In force · High confidence | In force | High confidence | |
| US 7,388,403 | Two-Stage Level Shifting Module In force · High confidence | In force | High confidence |
Also on record, not counted in the 361: 27 lapsed for an unpaid fee · 119 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
Every application published under this name has become a patent.