Minima Processor Oy
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Nov 2031
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Jan 11, 2027The maintenance fee for Coverage based microelectronic circuit, and method for providing a design of a microelectronic circuit (US 11,699,012) comes due Jan 11, 2027. Unpaid by Jul 12, 2027, it lapses early.
- 1 fee due May 5, 2027The maintenance fee for Level shifter and a method for shifting voltage level (US 10,469,084) comes due May 5, 2027. Unpaid by Nov 5, 2027, it lapses early.
- 1 fee due Aug 6, 2027The maintenance fee for Register circuit with detection of data events, and method for detecting data events in a register circuit (US 11,894,848) comes due Aug 6, 2027. Unpaid by Feb 7, 2028, it lapses early.
- 1 fee due Sep 12, 2027The maintenance fee for Method and arrangement for protecting a digital circuit against time errors (US 11,929,746) comes due Sep 12, 2027. Unpaid by Mar 13, 2028, it lapses early.
- 1 fee due Oct 9, 2027The maintenance fee for System with microelectronic circuit, and a method for controlling the operation of a microelectronic circuit (US 11,953,970) comes due Oct 9, 2027. Unpaid by Apr 10, 2028, it lapses early.
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 9,397,662 | Sequential circuit with current mode error detection In force · From the USPTO record | In force | From the USPTO record | |
| US 9,838,019 | Field effect transistor current mode logic with changeable bulk configuration of load transistors In force · From the USPTO record | In force | From the USPTO record | |
| US 10,013,295 | Control Mechanism Based on Timing Information In force · High confidence | In force | High confidence | |
| US 9,774,329 | Preventing Timing Violations In force · High confidence | In force | High confidence | |
| US 10,924,098 | Sequential circuit with timing event detection and a method of detecting timing events In force · From the USPTO record | In force | From the USPTO record | |
| US 10,114,442 | System and a method for controlling operating voltage In force · From the USPTO record | In force | From the USPTO record | |
| US 10,469,084 | Level shifter and a method for shifting voltage level In force · From the USPTO record | In force | From the USPTO record | |
| US 11,929,746 | Method and arrangement for protecting a digital circuit against time errors In force · From the USPTO record | In force | From the USPTO record | |
| US 11,558,039 | Method and arrangement for ensuring valid data at a second stage of a digital register circuit In force · From the USPTO record | In force | From the USPTO record | |
| US 12,085,611 | Applications of adaptive microelectronic circuits that are designed for testability In force · From the USPTO record | In force | From the USPTO record |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
1 abandoned · 1 no status recorded