NeuroBlade Ltd.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Jul 2038
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due May 14, 2027The maintenance fee for Variable word length access (US 11,817,167) comes due May 14, 2027. Unpaid by Nov 15, 2027, it lapses early.
- 1 fee due Jun 5, 2027The maintenance fee for Memory-based logic testing (US 11,837,305) comes due Jun 5, 2027. Unpaid by Dec 6, 2027, it lapses early.
- 1 fee due Jul 2, 2027The maintenance fee for Compensating for DRAM activation penalties (US 11,860,782) comes due Jul 2, 2027. Unpaid by Jan 3, 2028, it lapses early.
- 2 fees due Aug 13 to 27, 2027 · next Aug 13
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 10,762,034 | Memory-based distributed processor architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 10,885,951 | Memory-based distributed processor architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,023,336 | Memory-based distributed processor architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,269,743 | Memory-based distributed processor architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,301,340 | Memory-based distributed processor architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,514,996 | Memory-Based Processors In force · Medium confidence | In force | Medium confidence | |
| US 10,664,438 | Memory-based distributed processor architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,126,511 | Memory-based distributed processor architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 12,405,866 | High performance processor for low-way and high-latency memory instances In force · From the USPTO record | In force | From the USPTO record | |
| US 11,914,487 | Memory-based distributed processor architecture In force · From the USPTO record | In force | From the USPTO record |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
2 pending · 3 abandoned · 6 no status recorded