Next Silicon Ltd
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Aug 2038
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 2 fees due Feb 8, 2027
- 2 fees due Jul 16 to 30, 2027 · next Jul 16
- 1 fee due Oct 23, 2027The maintenance fee for Background processing during remote memory access (US 11,966,619) comes due Oct 23, 2027. Unpaid by Apr 24, 2028, it lapses early.
Recent changes
- 10 of the patents on this record were granted since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 11,176,041 | Reconfigurable Cache Architecture and Methods for Cache Coherency In force · High confidence | In force | High confidence | |
| US 11,720,496 | Reconfigurable Cache Architecture and Methods for Cache Coherency In force · High confidence | In force | High confidence | |
| US 12,360,902 | Reconfigurable Cache Architecture and Methods for Cache Coherency In force · High confidence | In force | High confidence | |
| US 10,817,309 | Runtime optimization of configurable hardware In force · From the USPTO record | In force | From the USPTO record | |
| US 10,817,344 | Directed and interconnected grid dataflow architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,644,990 | Interconnected Memory Grid with Bypassable Units In force · Low confidence | In force | Low confidence | |
| US 12,056,376 | Interconnected memory grid with bypassable units In force · From the USPTO record | In force | From the USPTO record | |
| US 11,269,526 | Interconnected memory grid with bypassable units In force · From the USPTO record | In force | From the USPTO record | |
| US 11,144,238 | Background processing during remote memory access In force · From the USPTO record | In force | From the USPTO record | |
| US 11,966,619 | Background processing during remote memory access In force · From the USPTO record | In force | From the USPTO record |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
7 pending · 3 no status recorded