Optiz, Inc.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Jun 2031
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Dec 9, 2026The maintenance fee for Method of making 3D integration microelectronic assembly for integrated circuit devices (US 9,054,013) comes due Dec 9, 2026. Unpaid by Jun 9, 2027, it lapses early.
- 1 fee due Mar 22, 2027The maintenance fee for Sensor package with exposed sensor array and method of making same (US 9,142,695) comes due Mar 22, 2027. Unpaid by Sep 22, 2027, it lapses early.
- 2 fees due May 17 to 24, 2027 · next May 17
- 2 fees due Jun 15 to 22, 2027 · next Jun 15
- 2 fees due Jul 5 to 12, 2027 · next Jul 5
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 8,753,925 | Method of making 3D integration microelectronic assembly for integrated circuit devices In force · From the USPTO record | In force | From the USPTO record | |
| US 9,054,013 | Method of making 3D integration microelectronic assembly for integrated circuit devices In force · From the USPTO record | In force | From the USPTO record | |
| US 9,230,947 | Method of forming 3D integrated microelectronic assembly with stress reducing interconnects In force · From the USPTO record | In force | From the USPTO record | |
| US 8,895,344 | Method of making a low stress cavity package for back side illuminated image sensor In force · From the USPTO record | In force | From the USPTO record | |
| US 9,373,653 | Stepped package for image sensor In force · From the USPTO record | In force | From the USPTO record | |
| US 8,546,951 | 3D integration microelectronic assembly for integrated circuit devices In force · From the USPTO record | In force | From the USPTO record | |
| US 8,546,900 | 3D integration microelectronic assembly for integrated circuit devices In force · From the USPTO record | In force | From the USPTO record | |
| US 8,552,518 | 3D integrated microelectronic assembly with stress reducing interconnects In force · From the USPTO record | In force | From the USPTO record | |
| US 9,214,592 | Method of Making Interposer Package for CMOS Image Sensor In force · High confidence | In force | High confidence | |
| US 8,432,011 | Wire bond interposer package for CMOS image sensor and method of making same In force · From the USPTO record | In force | From the USPTO record |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
2 no status recorded