Semiconductor Technologies & Instruments Pte Ltd.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
3
Ending by 2030
May 2027
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Dec 4, 2026The maintenance fee for Single ultra-planar wafer table structure for both wafers and film frames (US 10,312,124) comes due Dec 4, 2026. Unpaid by Jun 4, 2027, it lapses early.
- 1 fee due May 12, 2027The maintenance fee for Apparatus and method for automatically setting, calibrating and monitoring or measuring pickup head position and force during component pickup operations (US 10,475,690) comes due May 12, 2027. Unpaid by Nov 12, 2027, it lapses early.
- 1 fee due Jun 10, 2027The maintenance fee for Method system for generating 3D composite images of objects and determining object properties based thereon (US 10,504,761) comes due Jun 10, 2027. Unpaid by Dec 10, 2027, it lapses early.
- 1 fee due Jul 30, 2027The maintenance fee for Component handler (US 11,887,876) comes due Jul 30, 2027. Unpaid by Jan 31, 2028, it lapses early.
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 7,869,021 | Multiple surface inspection system and method In force · From the USPTO record | In force | From the USPTO record | |
| US 7,768,633 | Multiple surface inspection system and method In force · From the USPTO record | In force | From the USPTO record | |
| US 10,876,975 | System and method for inspecting a wafer In force · From the USPTO record | In force | From the USPTO record | |
| US 8,401,272 | Patterned wafer defect inspection system and method In force · From the USPTO record | In force | From the USPTO record | |
| US 9,863,889 | System and method for inspecting a wafer In force · From the USPTO record | In force | From the USPTO record | |
| US 9,620,398 | Apparatus for handling a semiconductor component In force · From the USPTO record | In force | From the USPTO record | |
| US 8,885,918 | System and method for inspecting a wafer In force · From the USPTO record | In force | From the USPTO record | |
| US 8,744,617 | Component pane handler configured to handle component panes of multiple sizes In force · From the USPTO record | In force | From the USPTO record | |
| US 10,161,881 | System and method for inspecting a wafer In force · From the USPTO record | In force | From the USPTO record | |
| US 8,834,091 | System and method using multiple component pane handlers configured to handle and transfer component panes In force · From the USPTO record | In force | From the USPTO record |
Also on record, not counted in the 20: 3 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
1 pending · 1 no status recorded