Siliconix Incorporated
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
Recorded under 5 name spellings.
0
Ending by 2030
Feb 2038
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due May 19, 2027The maintenance fee for Power Semiconductor Device with Optimized Field-Plate Design (US 10,483,356) comes due May 19, 2027. Unpaid by Nov 19, 2027, it lapses early.
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
Showing 1 to 9 of 9
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 10,483,356 | Power Semiconductor Device with Optimized Field-Plate Design In force · High confidence | In force | High confidence | |
| US 11,189,702 | Split gate semiconductor with non-uniform trench oxide In force · From the USPTO record | In force | From the USPTO record | |
| US 11,295,949 | Virtual wafer techniques for fabricating semiconductor devices In force · From the USPTO record | In force | From the USPTO record | |
| US 11,217,541 | Transistors with electrically active chip seal ring and methods of manufacture In force · From the USPTO record | In force | From the USPTO record | |
| US 10,950,699 | Termination for vertical trench shielded devices In force · From the USPTO record | In force | From the USPTO record | |
| US 11,218,144 | Semiconductor device with multiple independent gates In force · From the USPTO record | In force | From the USPTO record | |
| US 12,224,232 | Semiconductor package having side wall plating In force · From the USPTO record | In force | From the USPTO record | |
| US 12,211,704 | Semiconductor package having side wall plating In force · From the USPTO record | In force | From the USPTO record | |
| US 12,635,176 | Termination Structure In force · High confidence | In force | High confidence |
Also on record, not counted in the 9: 4 lapsed for an unpaid fee · 254 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
1 pending · 4 no status recorded