SiMa Technologies, Inc.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
Recorded under 2 name spellings.
0
Ending by 2030
Apr 2040
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 2 fees due Feb 22, 2027
- 2 fees due Apr 10 to 30, 2027 · next Apr 10
- 1 fee due Jul 30, 2027The maintenance fee for Inter-processor data transfer in a machine learning accelerator, using statically scheduled instructions (US 11,886,981) comes due Jul 30, 2027. Unpaid by Jan 31, 2028, it lapses early.
Recent changes
- 1 of the patents on this record was granted since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 11,321,607 | Machine Learning Network Implemented by Statically Scheduled Instructions, with Compiler In force · High confidence | In force | High confidence | |
| US 11,354,570 | Machine Learning Network Implemented by Statically Scheduled Instructions, with Mla Chip In force · High confidence | In force | High confidence | |
| US 11,403,519 | Machine Learning Network Implemented by Statically Scheduled Instructions, with System-On-Chip In force · High confidence | In force | High confidence | |
| US 11,803,740 | Ordering computations of a machine learning network in a machine learning accelerator for efficient memory usage In force · From the USPTO record | In force | From the USPTO record | |
| US 11,989,581 | Software managed memory hierarchy In force · From the USPTO record | In force | From the USPTO record | |
| US 11,586,894 | Ordering Computations of a Machine Learning Network in a Machine Learning Accelerator for Efficient Memory Usage In force · High confidence | In force | High confidence | |
| US 12,223,051 | Secure In-Service Firmware Update In force · High confidence | In force | High confidence | |
| US 11,631,001 | Heterogeneous Computing on a System-On-Chip, Including Machine Learning Inference In force · High confidence | In force | High confidence | |
| US 11,488,066 | Efficient convolution of multi-channel input samples with multiple kernels In force · From the USPTO record | In force | From the USPTO record | |
| US 11,782,757 | Scheduling off-chip memory access for programs with predictable execution In force · From the USPTO record | In force | From the USPTO record |
Also on record, not counted in the 23: 9 lapsed for an unpaid fee · 16 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
5 pending · 1 abandoned · 1 no status recorded