The Patent Finder

Skyechip Berhad

24 patents currently held · Updated Nov 14, 2026
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.

Recorded under 2 name spellings.

Previously recorded as Skyechip SDN BHD (to 2025)

0
Ending by 2030
Feb 2041
Next term end

When these terms end

Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045

Fee deadlines

Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
  • 1 fee due May 28, 2027
    The maintenance fee for Memory Controller System and a Method of Pre-Scheduling Memory Transaction for a Storage Device (US 11,829,643) comes due May 28, 2027. Unpaid by Nov 29, 2027, it lapses early.

Which patents, and when each one lapses · Pro

Recent changes

  • 4 of the patents on this record were granted since Aug 16, 2026

Patents held now

Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
PatentTitleStatus Expires Confidence
US 11,373,694Generic Physical Layer Providing a Unified Architecture for Interfacing with an External Memory Device and Methods of Interfacing with an External Memory Device
In force
 · High confidence
In forceHigh confidence
US 11,442,878Memory Sequencer System and a Method of Memory Sequencing Using Thereof
In force
 · High confidence
In forceHigh confidence
US 11,575,383Clocking System and a Method of Clock Synchronization
In force
 · High confidence
In forceHigh confidence
US 11,349,481I/O Transmitter Circuitry for Supporting Multi-Modes Serialization
In force
 · High confidence
In forceHigh confidence
US 11,411,394Voltage Clamping Circuit for Protecting an Internal Circuitry and a Method of Operating Thereof
In force
 · High confidence
In forceHigh confidence
US 11,349,691Apparatus and a Method for Handling Non-Continuous Data Transfer for a Decision Feedback Equalizer in a Memory Subsystem
In force
 · High confidence
In forceHigh confidence
US 11,609,709Memory Controller System and a Method for Memory Scheduling of a Storage Device
In force
 · High confidence
In forceHigh confidence
US 11,509,312Apparatus and a Method for Synchronizing Output Clock Signals Across a Plurality of Phase-Locked Loops
In force
 · High confidence
In forceHigh confidence
US 11,829,643Memory Controller System and a Method of Pre-Scheduling Memory Transaction for a Storage Device
In force
 · High confidence
In forceHigh confidence
US 12,210,633Memory Controller for Improving Data Integrity and Providing Data Security and a Method of Operating Thereof
In force
 · High confidence
In forceHigh confidence
10 of 24 patents shown.
Pro members see all 24.
Pro members: see all 24 patents

Sources and methods

Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand. How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
The Patent Finder CompaniesExpirationsCalculatorWatchlistPricing MethodologyCorrectionsLegalPrivacysupport@thepatentfinder.com Updated Nov 14, 2026 · includes USPTO assignment & status data published Nov 14, 2026 and grant & fee data published Nov 10, 2026 (weekly) Part of 137 Finder · © 2026 137 Finder LLC · Sources cited