Smart Modular Technologies, Inc.
10 more in force are now held by other companies
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
Recorded under 6 name spellings.
6
Ending by 2030
Nov 2026
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Jan 2, 2027The maintenance fee for Memory Controller for High Latency Memory Devices (US 10,338,821) comes due Jan 2, 2027. Unpaid by Jul 2, 2027, it lapses early.
- 1 fee due Mar 10, 2027The maintenance fee for Interconnected Memory System and Method of Operation Thereof (US 10,409,754) comes due Mar 10, 2027. Unpaid by Sep 10, 2027, it lapses early.
- 3 fees due May 12 to 26, 2027 · next May 12
- 2 fees due Jun 1 to 17, 2027 · next Jun 1
- 2 fees due Jul 7 to 14, 2027 · next Jul 7
- 2 fees due Aug 4 to 25, 2027 · next Aug 4
- 1 fee due Nov 3, 2027The maintenance fee for Storage System with Load Balancing Mechanism and Method of Operation Thereof (US 9,329,793) comes due Nov 3, 2027. Unpaid by May 3, 2028, it lapses early.
Recent changes
- 1 of the patents on this record was granted since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 8,068,378 | Clock and Power Fault Detection for Memory Modules In force · High confidence | In force | High confidence | |
| US 8,644,105 | Clock and Power Fault Detection for Memory Modules In force · High confidence | In force | High confidence | |
| US 7,724,604 | Clock and Power Fault Detection for Memory Modules In force · High confidence | In force | High confidence | |
| US 7,956,450 | Multi-Chip Package In force · High confidence | In force | High confidence | |
| US 10,755,757 | Multi-Rank Memory Module That Emulates a Memory Module Having a Different Number of Ranks In force · High confidence | In force | High confidence | |
| US 7,937,641 | Memory Modules with Error Detection and Correction In force · High confidence | In force | High confidence | |
| US 8,423,724 | Dynamic Back-Up Storage System with Rapid Restore and Method of Operation Thereof In force · High confidence | In force | High confidence | |
| US 8,379,391 | Memory Module with Vertically Accessed Interposer Assemblies In force · High confidence | In force | High confidence | |
| US 9,424,188 | Non-Volatile Memory Packaging System with Caching and Method of Operation Thereof In force · High confidence | In force | High confidence | |
| US 8,767,463 | Non-Volatile Dynamic Random Access Memory System with Non-Delay-Lock-Loop Mechanism and Method of Operation Thereof In force · High confidence | In force | High confidence |
Also on record, not counted in the 46: 10 patents in force now held by others · 14 lapsed for an unpaid fee · 11 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
7 pending · 2 abandoned · 6 no status recorded