High Resistivity Silicon-On-Insulator Substrate Having Enhanced Charge Trapping Efficiency

SunEdison, Inc.

A patent family: one line of work, grouped by real continuity rather than by a technology label inferred from titles. In-force patents first, soonest term end first, then patent number. Expired patents follow, in the same order.

Patent	Title	Holder	Status	Expires	Time remaining	Confidence
US 10,741,437	High Resistivity Silicon-On-Insulator Substrate Having Enhanced Charge Trapping Efficiency GlobalWafers Co., Ltd. In force Term ends Oct 9, 2037 · High confidence	GlobalWafers Co., Ltd.	In force	Term ends Oct 9, 2037	Term ends Oct 9, 2037	High confidence
US 10,832,937	High Resistivity Silicon-On-Insulator Substrate Having Enhanced Charge Trapping Efficiency GlobalWafers Co., Ltd. In force Term ends Oct 9, 2037 · High confidence	GlobalWafers Co., Ltd.	In force	Term ends Oct 9, 2037	Term ends Oct 9, 2037	High confidence
US 11,239,107	High Resistivity Silicon-On-Insulator Substrate Having Enhanced Charge Trapping Efficiency GlobalWafers Co., Ltd. In force Term ends Oct 9, 2037 · High confidence	GlobalWafers Co., Ltd.	In force	Term ends Oct 9, 2037	Term ends Oct 9, 2037	High confidence
US 10,546,771	High Resistivity Silicon-On-Insulator Substrate Having Enhanced Charge Trapping Efficiency GlobalWafers Co., Ltd. In force Term ends Nov 11, 2037 · High confidence	GlobalWafers Co., Ltd.	In force	Term ends Nov 11, 2037	Term ends Nov 11, 2037	High confidence

4 of 4 records shown. In-force patents first, soonest term end first, then patent number. Expired patents follow, in the same order.

1 of these is in force and held by SunEdison, Inc..

Updated Nov 15, 2026 · includes USPTO assignment & status data published Nov 15, 2026 and grant & fee data published Nov 10, 2026 (weekly) · how we know

Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.