Synopsys Emulation and Verification

Also on record

Records under this name other than the patents Synopsys Emulation and Verification holds now: patents now held by others, patents whose terms have ended, and its applications, pending or abandoned. None of them is counted in the 2 patents it holds.

Showing 1 to 8 of 8 · Back to Synopsys Emulation and Verification

Patent	Title	Status	Expires	Confidence
US 7,509,602	Compact processor element for a scalable digital logic verification and emulation system Term ended Term ended Jul 9, 2026 · From the USPTO record	Term ended	Term ended Jul 9, 2026	From the USPTO record
US 6,470,480	Tracing different states reached by a signal in a functional verification system Term ended Term ended Apr 18, 2021 · From the USPTO record	Term ended	Term ended Apr 18, 2021	From the USPTO record
US 6,480,988	Functional verification of both cycle-based and non-cycle based designs Term ended Term ended Apr 18, 2021 · From the USPTO record	Term ended	Term ended Apr 18, 2021	From the USPTO record
US 6,629,297	Tracing the change of state of a signal in a functional verification system Term ended Term ended Apr 1, 2021 · From the USPTO record	Term ended	Term ended Apr 1, 2021	From the USPTO record
US 6,625,786	Run-time controller in a functional verification system Term ended Term ended Mar 30, 2021 · From the USPTO record	Term ended	Term ended Mar 30, 2021	From the USPTO record
US 6,691,287	Functional verification system Term ended Term ended Dec 31, 2020 · From the USPTO record	Term ended	Term ended Dec 31, 2020	From the USPTO record
US 6,629,296	Functional verification of integrated circuit designs Term ended Term ended Jan 15, 2019 · From the USPTO record	Term ended	Term ended Jan 15, 2019	From the USPTO record
US 6,138,266	Functional verification of integrated circuit designs Term ended Term ended Jun 15, 2018 · From the USPTO record	Term ended	Term ended Jun 15, 2018	From the USPTO record