77 patents currently held
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
The next term ends in Jan 2027. from the record
Free plan: 3 watched companies. Pro: unlimited.
Alerts on its grants, lapses and transfers.
52
Ending by 2030
Jan 2027
Next term end
74
Patent families
When these terms end
Held patents by the year their term ends
notable patents
fee due within 90 days
all others
Updated Nov 14, 2026 · includes USPTO assignment & status data published Nov 14, 2026 and grant & fee data published Nov 10, 2026 (weekly) · how we know
Notable: the highest-ranked patents in this portfolio by citations and family size. Fee due within 90 days: a maintenance fee is due within 90 days of when this page was computed and not yet paid.
Notable patents
Ranked by citations and family size, against patents of the same kind granted the same year. How we rank
Notable
Ends Oct 2033 · High confidence
Also notable
Ends May 2027 · High confidence
Also notable
Ends Dec 2027 · High confidence
Method of Forming Different Voltage Devices with High-K Metal Gate
US 9,142,566
Cited by 53 later US patents, top 10% of utility patents granted in 2015 in our data, and renewed at every maintenance window due so far. Protection runs to 2033.
Method of Packaging a Device Using a Dielectric Layer
US 7,476,563
Cited by 65 later US patents, top 25% of utility patents granted in 2009 in our data, and renewed at 3 of 3 maintenance windows. Protection runs to 2027.
Phase Change Memory Structures Including Pillars
US 7,719,039
Cited by 34 later US patents, top 25% of utility patents granted in 2010 in our data, and renewed at 3 of 3 maintenance windows. Protection runs to 2027.
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 2 fees due Jan 7 to 14, 2027 · next Jan 7
- 3 fees due Feb 4 to 25, 2027 · next Feb 4
- 2 fees due Mar 22, 2027
- 2 fees due May 17 to 24, 2027 · next May 17
- 1 fee due Jun 15, 2027The maintenance fee for Integrated Circuit and Method for Reducing an Impact of Electrical Stress in an Integrated Circuit (US 9,214,924) comes due Jun 15, 2027. Unpaid by Dec 15, 2027, it lapses early.
- 2 fees due Aug 2 to 16, 2027 · next Aug 2
- 1 fee due Oct 5, 2027The maintenance fee for System and Method for Multicore Processing (US 9,304,880) comes due Oct 5, 2027. Unpaid by Apr 5, 2028, it lapses early.
Recent changes
- 6 terms have ended since Aug 16, 2026
What they patent
The 5 largest of its 74 families, grouped by real patent family and labeled by the earliest filing in each. No technology classification is inferred from titles.
| Method of Forming Different Voltage Devices with High-K Metal Gate | 2 in force | to Oct 2033 |
| Phase Change Memory Structures | 2 in force | to Jan 2029 |
| Semiconductor Fabrication Process Including Silicide Stringer Removal Processing | 2 in force | to Jan 2027 |
| Integrated Circuit, Integrated Circuit Package and Method of Providing Protection Against an Electrostatic Discharge Event | 1 in force | to Feb 2032 |
| Method for Placing Operational Cells in a Semiconductor Device | 1 in force | to Dec 2031 |
Patents held now
Soonest term end first.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 7,443,745 | Byte Writeable Memory with Bit-Column Voltage Selection and Column Redundancy In force · High confidence | In force | High confidence | |
| US 7,998,822 | Semiconductor Fabrication Process Including Silicide Stringer Removal Processing In force · High confidence | In force | High confidence | |
| US 7,446,006 | Semiconductor Fabrication Process Including Silicide Stringer Removal Processing In force · High confidence | In force | High confidence | |
| US 7,468,313 | Engineering Strain in Thick Strained-Soi Substrates In force · High confidence | In force | High confidence | |
| US 7,955,973 | Method and Apparatus for Improvements in Chip Manufacture and Design In force · High confidence | In force | High confidence | |
| US 7,476,563 | Method of Packaging a Device Using a Dielectric Layer In force · High confidence | In force | High confidence | |
| US 7,649,764 | Memory with Shared Write Bit Line(S) In force · High confidence | In force | High confidence | |
| US 8,219,761 | Multi-Port High-Level Cache Unit and a Method for Retrieving Information from a Multi-Port High-Level Cache Unit In force · High confidence | In force | High confidence | |
| US 7,523,373 | Minimum Memory Operating Voltage Technique In force · High confidence | In force | High confidence | |
| US 7,675,806 | Low Voltage Memory Device and Method Thereof In force · High confidence | In force | High confidence |
Also on record, not counted in the 77: 92 patents ended · 2 applications abandoned. List them
Sources and methods
Compiled from USPTO application file histories, grants and recorded assignments, with the company's own names reviewed by hand. How this record was built
Portfolio grouped automatically from ownership conveyances to the names matched to this company, usually every name that begins with its own, so it counts patents an affiliate holds; each list row names the holder of record. Security interests are excluded and ambiguous records are not reviewed by hand.
Fee due within 90 days marks a patent with a maintenance fee due within 90 days of the date this page was computed and not yet recorded paid, so it can end earlier than the bar shows. A fee left unpaid ends the patent at the close of the six month grace period that follows its due date, not on the due date itself. It is not a prediction that the fee will be missed.
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.