Weebit Nano Ltd.

17 patents currently held · Updated Nov 14, 2026

Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.

Ending by 2030

Nov 2040

Next term end

When these terms end

5 yrs10 yrs20 yrs

Held patents by the year their term ends

20262027202820292030203120322033203420352036203720382039204020412042204320442045

Fee deadlines

Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.

1 fee due Nov 23, 2026
The maintenance fee for Silicon over insulator two-transistor one-resistor in-series resistive memory cell (US 11,659,720) comes due Nov 23, 2026. Unpaid by May 24, 2027, it lapses early.

Which patents, and when each one lapses · Pro

Recent changes

Nothing was recorded against this company's patents in the last 90 days.

Patents held now

Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.

Patent	Title	Status	Expires	Confidence
US 12,224,007	Method for Determining a Manufacturing Parameter of a Resistive Random Access Memory Cell In force Term ends Nov 12, 2040 · High confidence	In force	Term ends Nov 12, 2040	High confidence
US 12,349,605	Method for Manufacturing an Oxram Type Resistive Memory Cell In force Term ends Nov 15, 2040 · High confidence	In force	Term ends Nov 15, 2040	High confidence
US 12,165,706	Method for Resetting an Array of Resistive Memory Cells In force Term ends Apr 1, 2041 · High confidence	In force	Term ends Apr 1, 2041	High confidence
US 12,033,698	Method for Resetting an Array of Resistive Memory Cells In force Term ends Apr 13, 2041 · High confidence	In force	Term ends Apr 13, 2041	High confidence
US 11,538,524	Silicon over insulator two-transistor two-resistor in-series resistive memory cell In force Term ends Jul 12, 2041 · From the USPTO record	In force	Term ends Jul 12, 2041	From the USPTO record
US 11,659,720	Silicon over insulator two-transistor one-resistor in-series resistive memory cell In force Term ends Nov 23, 2041 · From the USPTO record	In force	Term ends Nov 23, 2041	From the USPTO record
US 12,347,487	Current and Voltage Limit Circuitry for Resistive Random Access Memory Programming In force Term ends Dec 29, 2041 · High confidence	In force	Term ends Dec 29, 2041	High confidence
US 12,349,609	Low Forming Voltage Oxram Memory Cell, and Associated Method of Manufacture In force Term ends May 26, 2042 · High confidence	In force	Term ends May 26, 2042	High confidence
US 12,052,876	Memory Comprising a Matrix of Resistive Memory Cells, and Associated Method of Interfacing In force Term ends Sep 1, 2042 · High confidence	In force	Term ends Sep 1, 2042	High confidence
US 12,040,017	Current and Voltage Limit Circuitry for Resistive Random Access Memory Programming In force Term ends Sep 24, 2042 · High confidence	In force	Term ends Sep 24, 2042	High confidence

10 of 17 patents shown.

Pro members see all 17.

Pro members: see all 17 patents

Sources and methods

Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand. How this record was built

Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.

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Published applications

US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.

7 pending · 1 no status recorded

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