Xenergic AB
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Sep 2035
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Mar 26, 2027The maintenance fee for High-dimensional multi-distributed importance sampling for circuit yield analysis (US 11,768,986) comes due Mar 26, 2027. Unpaid by Sep 27, 2027, it lapses early.
- 1 fee due May 7, 2027The maintenance fee for Area-efficient dual-port and multi-port SRAM. area-efficient memory cell for SRAM (US 11,810,615) comes due May 7, 2027. Unpaid by Nov 8, 2027, it lapses early.
- 1 fee due Jun 26, 2027The maintenance fee for SRAM architecture (US 11,854,608) comes due Jun 26, 2027. Unpaid by Dec 27, 2027, it lapses early.
- 1 fee due Aug 13, 2027The maintenance fee for Shiftable memory and method of operating a shiftable memory (US 11,901,006) comes due Aug 13, 2027. Unpaid by Feb 14, 2028, it lapses early.
Recent changes
Nothing was recorded against this company's patents in the last 90 days.
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
Showing 1 to 10 of 10
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 10,304,525 | New SRAM Architecture In force · High confidence | In force | High confidence | |
| US 10,811,084 | SRAM architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,462,262 | SRAM architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,854,608 | SRAM architecture In force · From the USPTO record | In force | From the USPTO record | |
| US 11,768,986 | High-dimensional multi-distributed importance sampling for circuit yield analysis In force · From the USPTO record | In force | From the USPTO record | |
| US 11,901,006 | Shiftable memory and method of operating a shiftable memory In force · From the USPTO record | In force | From the USPTO record | |
| US 11,810,615 | Area-efficient dual-port and multi-port SRAM. area-efficient memory cell for SRAM In force · From the USPTO record | In force | From the USPTO record | |
| US 12,045,553 | Method for implementing an integrated circuit comprising a random-access memory-in-logic In force · From the USPTO record | In force | From the USPTO record | |
| US 12,374,374 | Precharge circuitry for memory In force · From the USPTO record | In force | From the USPTO record | |
| US 12,451,183 | Burst Access Memory and Method of Operating a Burst Access Memory In force · High confidence | In force | High confidence |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
Every application published under this name has become a patent.