Xmos Ltd.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
12
Ending by 2030
Mar 2027
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 2 fees due Dec 4 to 11, 2026 · next Dec 4
- 1 fee due Feb 27, 2027The maintenance fee for Compensation memory (CM) for power application (US 10,396,800) comes due Feb 27, 2027. Unpaid by Aug 27, 2027, it lapses early.
- 2 fees due Mar 10 to 24, 2027 · next Mar 10
- 1 fee due Apr 15, 2027The maintenance fee for Power management integrated circuit integrating field effect transistors and programmable fabric (US 10,447,276) comes due Apr 15, 2027. Unpaid by Oct 15, 2027, it lapses early.
- 1 fee due Jun 3, 2027The maintenance fee for Methods and systems for improved measurement, entity and parameter estimation, and path propagation effect measurement and mitigation in source signal separation (US 10,497,381) comes due Jun 3, 2027. Unpaid by Dec 3, 2027, it lapses early.
Recent changes
- 1 of the patents on this record was granted since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 8,185,719 | Message routing scheme for an array having a switch with address comparing component and message routing component In force · From the USPTO record | In force | From the USPTO record | |
| US 7,617,386 | Scheduling thread upon ready signal set when port transfers data on trigger time activation In force · From the USPTO record | In force | From the USPTO record | |
| US 7,613,909 | Resuming thread to service ready port transferring data externally at different clock rate than internal circuitry of a processor In force · From the USPTO record | In force | From the USPTO record | |
| US 7,676,653 | Compact instruction set encoding In force · From the USPTO record | In force | From the USPTO record | |
| US 8,185,722 | Processor instruction set for controlling threads to respond to events In force · From the USPTO record | In force | From the USPTO record | |
| US 7,958,333 | Processor with memory access stage adapted to fetch an instruction of a thread when no memory access operation is detected In force · From the USPTO record | In force | From the USPTO record | |
| US 7,962,717 | Message routing scheme In force · From the USPTO record | In force | From the USPTO record | |
| US 9,367,321 | Processor instruction set for controlling an event source to generate events used to schedule threads In force · From the USPTO record | In force | From the USPTO record | |
| US 7,948,060 | Integrated circuit structure In force · From the USPTO record | In force | From the USPTO record | |
| US 8,224,884 | Processor communication tokens In force · From the USPTO record | In force | From the USPTO record |
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
1 pending · 7 no status recorded