Yield Microelectronics Corp.
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
1
Ending by 2030
Dec 2026
Next term end
When these terms end
Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045
Fee deadlines
Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
- 1 fee due Feb 28, 2027The maintenance fee for Small-area side-capacitor read-only memory device, memory array and method for operating the same (US 11,742,039) comes due Feb 28, 2027. Unpaid by Aug 30, 2027, it lapses early.
- 1 fee due Jul 19, 2027The maintenance fee for Method for operating low-cost EEPROM array (US 9,240,242) comes due Jul 19, 2027. Unpaid by Jan 19, 2028, it lapses early.
- 1 fee due Sep 8, 2027The maintenance fee for Non-volatile memory with a single gate-source common terminal and operation method thereof (US 9,281,312) comes due Sep 8, 2027. Unpaid by Mar 8, 2028, it lapses early.
- 1 fee due Oct 19, 2027The maintenance fee for Method for operating small-area EEPROM array (US 9,318,208) comes due Oct 19, 2027. Unpaid by Apr 19, 2028, it lapses early.
- 1 fee due Nov 5, 2027The maintenance fee for Method for operating low-current EEPROM array (US 10,643,708) comes due Nov 5, 2027. Unpaid by May 5, 2028, it lapses early.
Recent changes
- 1 of the patents on this record was granted since Aug 16, 2026
Patents held now
Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
| Patent | Title | Status | Expires | Confidence |
|---|---|---|---|---|
| US 7,423,903 | Single-gate non-volatile memory and operation method thereof In force · From the USPTO record | In force | From the USPTO record | |
| US 8,218,369 | Non-volatile memory low voltage and high speed erasure method In force · From the USPTO record | In force | From the USPTO record | |
| US 8,305,808 | Low-voltage EEPROM array In force · From the USPTO record | In force | From the USPTO record | |
| US 8,300,469 | Cost saving electrically-erasable-programmable read-only memory (EEPROM) array In force · From the USPTO record | In force | From the USPTO record | |
| US 8,300,461 | Area saving electrically-erasable-programmable read-only memory (EEPROM) array In force · From the USPTO record | In force | From the USPTO record | |
| US 9,281,312 | Non-volatile memory with a single gate-source common terminal and operation method thereof In force · From the USPTO record | In force | From the USPTO record | |
| US 9,240,242 | Method for operating low-cost EEPROM array In force · From the USPTO record | In force | From the USPTO record | |
| US 9,318,208 | Method for operating small-area EEPROM array In force · From the USPTO record | In force | From the USPTO record | |
| US 9,601,202 | Low voltage difference operated EEPROM and operating method thereof In force · From the USPTO record | In force | From the USPTO record | |
| US 10,242,741 | Low Voltage Difference Operated EEPROM and Operating Method Thereof In force · High confidence | In force | High confidence |
Also on record, not counted in the 26: 1 lapsed for an unpaid fee · 1 ended at full term. List them
Sources and methods
Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand.
How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.
Published applications
US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.
1 pending · 9 no status recorded