The Patent Finder

Zing Semiconductor Corporation

40 patents currently held · Updated Nov 15, 2026
1 more in force is now held by another company
Held is read from USPTO's recorded assignments; a transfer never recorded there does not appear.
0
Ending by 2030
Jan 2036
Next term end

When these terms end

Held patents by the year their term ends
20262027202820292030203120322033203420352036203720382039204020412042204320442045

Fee deadlines

Maintenance fees fall due 3.5, 7.5 and 11.5 years after grant. A missed fee ends a patent at the end of the six month grace period that follows, not on the due date.
  • 1 fee due Aug 4, 2027
    The maintenance fee for Complementary metal-oxide-semiconductor field-effect transistor and method thereof (US 10,553,496) comes due Aug 4, 2027. Unpaid by Feb 4, 2028, it lapses early.
  • 1 fee due Sep 5, 2027
    The maintenance fee for Method for detecting temperature of thermal chamber (US 11,923,254) comes due Sep 5, 2027. Unpaid by Mar 6, 2028, it lapses early.

Which patents, and when each one lapses · Pro

Recent changes

Nothing was recorded against this company's patents in the last 90 days.

Patents held now

Soonest term end first. Each date below is computed on that patent's own page, which shows the rule, the adjustments and the fee history it was derived from.
PatentTitleStatus Expires Confidence
US 9,647,107Fabrication method for forming vertical transistor on hemispherical or polygonal patterned semiconductor substrate
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,634,151High voltage junctionless field effect device and its method of fabrication
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,818,844High-voltage junctionless device with drift region and the method for making the same
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,634,133Method of forming fin structure on patterned substrate that includes depositing quantum well layer over fin structure
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,773,670Method of preparation of III-V compound layer on large area Si insulating substrate
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,721,846Hybrid integration fabrication of nanowire gate-all-around GE PFET and polygonal III-V PFET CMOS device
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,640,615Method for making III-V nanowire quantum well transistor
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,837,517Method for making III-V nanowire quantum well transistor
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,875,943Complementary metal-oxide-semiconductor field-effect transistor and method thereof
In force
 · From the USPTO record
In forceFrom the USPTO record
US 9,793,285Metal-ono-vacuum tube charge trap flash (VTCTF) nonvolatile memory and the method for making the same
In force
 · From the USPTO record
In forceFrom the USPTO record
10 of 40 patents shown.
Pro members see all 40.
Pro members: see all 40 patents
Also on record, not counted in the 40: 1 patent in force now held by others. List them

Sources and methods

Compiled from the USPTO record, grants, published applications and recorded assignments, not yet reviewed by hand. How this record was built
Computed patent terms end on the dates shown. Related patents and pending applications may cover overlapping subject matter.

Published applications

US patent applications published under this name that have not become patents. An application is published about eighteen months after its earliest filing; one that has not been published is in no public record.

7 pending · 9 abandoned · 42 no status recorded

List them

The Patent Finder CompaniesExpirationsCalculatorWatchlistPricing MethodologyCorrectionsLegalPrivacysupport@thepatentfinder.com Updated Nov 15, 2026 · includes USPTO assignment & status data published Nov 15, 2026 and grant & fee data published Nov 10, 2026 (weekly) Part of 137 Finder · © 2026 137 Finder LLC · Sources cited